at28c16-t 16k (2k x 8) pcmcia nonvolatile attribute memory tsop top view pin name function a0 - a10 addresses ce chip enable oe output enable we write enable i/o0 - i/o7 data inputs/outputs rdy/ bsy ready/busy output nc no connect pin configurations features ideal rewriteable attribute memory simple write operation self-timed byte writes on-chip address and data latch for sram-like write operation fast write cycle time - 1 ms 5-volt-only nonvolatile writes end of write detection rdy/ busy output data polling high reliability endurance: 100,000 write cycles data retention: 10 years minimum single 5-volt supply for read and write very low power 30 ma active current 100 m a standby current description the at28c16-t is the ideal nonvolatile attribute memory: it is a low power, 5-volt-only byte writeable nonvolatile memory (e 2 prom). standby current is typically less than 100 ma . the at28c16-t is written like a static ram, eliminating complex program- ming algorithms. the fast write cycle times of 1 ms, allow quick card reconfiguration in-system. data retention is specified as 10 years minimum, precluding the necessity for batteries. three access times have been specified to allow for varying layers of buffering between the memory and the pcmcia interface. the at28c16-t is accessed like a static ram for read and write operations. during a byte write, the address and data are latched internally. following the initiation of a write cycle, the device will go to a busy state and automatically write the latched data using an internal control timer. the device provides two methods for detecting the end of a write cycle; the rdy/ busy output and data polling of i/o 7 . 0285c at28c16-t 2-175
block diagram temperature under bias................. -55c to +125c storage temperature...................... -65c to +125c all input voltages (including nc pins) with respect to ground ................... -0.6v to +6.25v all output voltages with respect to ground .............-0.6v to v cc + 0.6v voltage on oe and a9 with respect to ground ................... -0.6v to +13.5v *notice: stresses beyond those listed under absolute maxi- mum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond those indi- cated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings* 2-176 at28c16-t
device operation read: the at28c16-t is accessed like a static ram. when ce and oe are low and we is high, the data stored at the memory location detemined by the address pins is asserted on the outputs. the outputs are put in a high im- pedance state whenever ce or oe is high. this dual-line control gives designers increased flexibility in preventing bus contention. byte write: writing data into the at28c16-t is similar to writing into a static ram. a low pulse on we or ce input with oe high and ce or we low (respectively) initiates a byte write. the address is latched on the falling edge of we or ce (whichever occurs last) and the data is latched on the rising edge of we or ce (whichever occurs first). once a byte write is started it will automatically time itself to completion. for the at28c16-t the write cycle time is 1 ms maximum. once a programming operation has been initiated and for the duration of t wc , a read operation will effectively be a polling operation. ready/ busy: pin 1 is an open drain ready/ busy out- put that indicates the current status of the self-timed inter- nal write cycle. ready/ busy is actively pulled low during the write cycle and is released at the completion of the write. the open drain output allows or-tying of several devices to a common interrupt input. data polling: the at28c16-t also provides data polling to signal the completion of a write cycle. during a write cycle, an attempted read of the the data being written results in the complement of that data for i/o 7 (the other outputs are indeterminate). when the write cycle is fin- ished, true data appears on all ouputs. write protection: inadvertent writes to the device are protected against in the following ways: (a) v cc sense if v cc is below 3.8v (typical) the write function is inhibited; (b) v cc power on delay once v cc has reached 3.8v the device will automatically time out 5 ms (typical) before allowing a byte write; (c) write inhibit holding any one of oe low, ce high or we high inhibits byte write cycles. chip clear: the contents of the entire memory of the at28c16-t may be set to the high state by the chip clear operation. by setting ce low and oe to 12v, the chip is cleared when a 10ms low pulse is applied to we. device identification: an extra 32-bytes of e 2 prom memory are available to the user for device identifcation. by raising a 9 to 12v ( 0.5v) and using ad- dress locations 7e0h to 7ffh the additional bytes may be written to or read from in the same manner as the regular memory array. at28c16-t 2-177
AT28C16-15T operating temperature (case) com. 0c - 70c ind. -40c - 85c v cc power supply 5v 10% dc and ac operating range mode ce oe we i/o read v il v il v ih d out write (2) v il v ih v il d in standby/write inhibit v ih x (1) x high z write inhibit x x v ih write inhibit x v il x output disable x v ih x high z chip erase v il v h (3) v il high z 3. v h = 12.0v 0.5v. notes: 1. x can be v il or v ih . 2. refer to ac programming waveforms. operating modes symbol parameter condition min max units i li input load current v in = 0v to v cc + 1v 10 m a i lo output leakage current v i/o = 0v to v cc 10 m a i sb1 v cc standby current cmos ce = v cc - 0.3v to v cc + 1.0v 100 m a i sb2 v cc standby current ttl ce = 2.0v to v cc + 1.0v com. 2 ma ind. 3 ma i cc v cc active current f = 5 mhz; i out = 0 ma com. 30 ma ind. 45 ma v il input low voltage 0.8 v v ih input high voltage 2.0 v v ol output low voltage i ol = 2.1 ma .4 v v oh output high voltage i oh = -400 m a 2.4 v dc characteristics 2-178 at28c16-t
pcmcia symbol atmel symbol parameter AT28C16-15T min max units t c (r) t rc read cycle time 150 ns t a (a) t acc address access time 150 ns t a (ce) t ce (1) ce access time 150 ns t a (oe) t oe (2) oe access time 0 75 ns t en (ce) t lz (4) output enable time from ce 0 ns t en (oe) t olz (4) output enable time from oe 0 ns t v (a) t oh output hold time 0 ns t dis (ce) t df (3, 4) output disable time from ce 0 50 ns t dis (oe) t df (3, 4) output disable time from oe 0 50 ns ac read characteristics notes: 1. ce may be delayed up to t acc - t ce after the address transition without impact on t acc . 2. oe may be delayed up to t ce - t oe after the falling edge of ce without impact on t ce or by t acc - t oe after an address change without impact on t acc . 3. t df is specified from oe or ce whichever occurs first (c l = 5 pf). 4. this parameter is characterized and is not 100% tested. ac read waveforms (1, 2, 3, 4) t r , t f < 5 ns input test waveforms and measurement level output test load typ max units conditions c in 46pfv in = 0v c out 812pfv out = 0v pin capacitance (f = 1 mhz, t = 25c) (1) note: 1. this parameter is characterized and is not 100% tested. at28c16-t 2-179
pcmcia symbol atmel symbol parameter min max units t su (a) t as address setup time 10 ns t su (oe-we) t oes output disable time to we 10 ns t su (ce-we) t cs chip enable time to we 0 ns t w (we) t wp write enable pulse width 100 1000 ns t su (d-weh) t ds data setup to we high 50 ns t h (a) t ah address hold time from we 50 ns t h (d) t dh data hold time from we high 10 ns t h (oe-we) t oeh output enable hold time from we high 10 ns t h (ce-we) t ch chip enable hold time from we high 0 ns t d (b) t db delay from we high to busy asserted 50 ns t c (w) t wc write cycle time 1 ms ac write characteristics ac write waveforms 2-180 at28c16-t
note: 1. data polling ac timing characteristics are the same as the ac read characteristics. data polling waveforms chip erase waveforms t s = t h = 1 m sec (min.) t w = 10 msec (min.) v h = 12.0 0.5v at28c16-t 2-181
t acc (ns) i cc (ma) ordering code package operation range active standby 150 30 0.1 AT28C16-15Tc 28t commercial (0 c to 70 c) 45 0.1 AT28C16-15Ti 28t industrial (-40 c to 85 c) ordering information (1) notes: 1. see valid part number table below. 2. the 28c16 200 ns and 250 ns speed selections have been removed from valid selections table and are replaced by the faster 150 ns t aa offering. package type 28t 28 lead, plastic thin small outline package (tsop) the following table lists standard atmel products that can be ordered. device numbers speed package and temperature combinations at28c16 15 tc, ti valid part numbers 2-182 at28c16-t
|
